This invention relates to a plane type display device used as an image display device for various kinds of electronic and electric appliances, a TV or the like, and more particularly to a display device which uses field emission cathodes (hereinafter referred to as "FECs") acting as an electron generating source in combination with thin film transistors (hereinafter referred to as "TFTs") to provide a display of high luminescence.
A plane-type display device which has been conventionally put into practice includes a liquid crystal display device (LCD), an electroluminescence display device (ELD), a plasma display panel (PDP), a fluorescent display device (VFD) and the like. Various improvements have been made on the plane-type display device in order to provide a substitute for a cathode ray tube.
For example, for the purpose of improving the number of picture cells and display density in the LCD, techniques have been employed wherein one electrode means is constituted by a TFT array and the selection of picture cells is carried out through the driving of a matrix while using one of the electrodes of the TFTs as one electrode. Such TFT techniques are likewise employed in the VFD, wherein each of electrodes of the the TFTs constitutes one electrode of the VFD and a phosphor is deposited on the electrode to form an anode, which is subject to an On/Off operation by matrix driving using the TFTs, to thereby control impingement of electrons from a cathode onto the anode, resulting in light emission or luminance of the anode.
The recent progress of techniques for finely processing a semiconductor has caused a possibility of permitting the FEC which was developed to provide a cathode for a vacuum tube IC to to be used as a plane electron source, so that the application to various devices are being considered now.
A typical structure of the FEC is exemplified in FIG. 6, wherein reference numeral 100 designates a substrate doped with impurities in high concentration, resulting in the substrate being provided with high conductivity. The substrate 100 is formed thereon with an insulating layer 101 made of SiO.sub.2, which is formed therein with cavities 102. In each of the cavities 102 is arranged an emitter 103 formed of Mo so as to act as an electron emitting section. Also, the FEC includes a thin film which is made of Mo and deposited on the insulating layer in a manner to surround the emitter 103, to thereby function as a gate electrode 104.
The FEC constructed as described above may be produced by resist coating utilized as fine processing techniques in the manufacture of a semiconductor, electron beam exposure, etching or the like. The FEC is so formed into such dimensions that the cavity 102 is 1 to 2 .mu.m in diameter, the insulating layer 101 is 1 to 2 .mu.m in thickness and the gate electrode 104 is about 0.4 .mu.m in thickness. Also, the emitters of 100 to 10,000 in number, each of which is formed into a cone-like shape, are integrated on an area of about 25 mm square, leading to the FEC.
The so-constructed FEC causes an electric field of about 10.sup.6 to 10.sup.7 V/cm to be generated between the distal end of the emitter 103 and the gate electrode 104 when the gate electrode is biased within the range between tens of volts and hundreds of volts against the substrate 100, so that electrons of hundreds mA in all may be discharged from the distal end of the emitter 103.
Thus, the FEC is expected to be reduced in power consumption because of a cold cathode as compared with a thermionic cathode which has been conventionally used for a fluorescent display device, permit matrix driving of the cathode itself acting as an electron emitting source and provide a plane electrode of a large area. A display device using the FECs has been proposed as disclosed in Japanese Patent Application Laid-Open Publication No. 221783/1986 and "JAPAN DISPLAY "86" pp. 512 to 514.
However, the LCD using the TFTs further requires driving TFTs arranged on the same plane as picture cells in addition to TFTs for the picture cells, as well as a capacitor for approaching the duty to 1. Unfortunately, they cause a dead area to be formed in a display area, resulting in failing to improve display density.
Also, the display device using the FECs generally employs a driving mode wherein an X-Y matrix is defined by the substrate on which the FECs of a cone-like shape are arranged (cathode line) and a gate electrode line and the FECs are driven in a time-sharing manner. Thus, the duty cycle is decreased as the display density is increased, so that the display device fails to exhibit sufficient luminescence. An increase in luminescence requires an increase in gate voltage or an anode voltage, thus, the structure of the device is complicated because steps such as insulation between the electrodes and the like are required.